afct-5179xz sc duplex single mode transceiver data sheet description the afct-5179xz transceiver is a high performance, cost efective module for serial optical data communications applications specifed for a signal rate of 125 mbd. it is designed for fast ethernet applications and is also com - patible with efm baseline 100base-lx10 standard over dual single mode fber. this module is designed for single mode fber and operates at a nominal wavelength of 1300 nm. it incorpo - rates avago technologies high performance, reliable, long wavelength optical devices and proven circuit technology to give long life and consistent service. the transmitter section uses a multiple quantum well laser with full iec 825 and cdrh class i eye safety. the receiver section uses a planar pin photodetector for low dark current and excellent responsivity. a pseudo-ecl logic interface simplifes interface to external circuitry. features ? sc duplex single mode transceiver ? single +3.3 v or +5 v power supply ? multisourced 1 x 9 pin confguration ? manufactured in an iso9001 certifed factory ? aqueous washable plastic package ? interchangeable with led multisourced 1 x 9 trans- ceivers ? unconditionally eye safe laser iec 825/cdrh class 1 compliant ? designed for efm (ethernet in the first mile) baseline 100base-lx10 performance over dual single mode fber ? rohs compliant ? two temperature ranges: 0 c to +70 c, afct-5179bz/dz -40 c to +85 c, AFCT-5179AZ/cz applications ? fast ethernet ? ethernet in the first mile
2 connection diagram receiver signal ground receiver data out receiver data out bar signal detect receiver power supply transmitter power supply transmitter data in bar transmitter data in transmitter signal ground o o o o o o o o o 1 2 3 4 5 6 7 8 9 top view n/c n/c pin descriptions: pin 1 receiver signal ground v eer : directly connect this pin to the receiver ground plane. pin 2 receiver data out rd: see recommended circuit schematic, figure 4. pin 3 receiver data out bar rd: see recommended circuit schematic, figure 4. pin 4 signal detect sd: normal optical input levels to the receiver result in a logic 1 output. low optical input levels to the receiver result in a fault condition indicated by a logic 0 output. this signal detect output can be used to drive a pecl input on an upstream circuit, such as signal detect input or loss of signal-bar. pin 5 receiver power supply v cc r: provide +3.3 v or +5 v dc via the recommended transmit - ter power supply flter circuit. locate the power supply flter circuit as close as possible to the v cc pin. pin 6 transmitter power supply v cc t: provide +3.3 v or +5 v dc via the recommended transmit - ter power supply flter circuit. locate the power supply flter circuit as close as possible to the v cc pin. pin 7 transmitter data in bar td: see recommended circuit schematic, figure 4. pin 8 transmitter data in td: see recommended circuit schematic, figure 4. pin 9 transmitter signal ground v ee t: directly connect this pin to the transmitter ground plane. mounting studs the mounting studs are provided for mechanical attach - ment to the circuit board. they are embedded in the nonconductive plastic housing and are not tied to the transceiver internal circuit and should be soldered into plated-through holes on the printed circuit board.
3 functional description receiver section design the receiver section contains an ingaas/inp photo detector and a preamplifer within the receptacle, coupled to a postamplifer/decision circuit on a separate circuit board. the postamplifer is ac coupled to the preamplifer as illus - trated in figure 1. the coupling capacitor is large enough to pass the efm test pattern at 125 mbd without signif - cant distortion or performance penalty. figure 1 also shows a flter network which limits the band- width of the preamp output signal. the flter is designed to bandlimit the preamp output noise and thus improve the receiver sensitivity. these components will also reduce the sensitivity of the receiver as the signal bit rate is increased above 155 mbd. noise immunity the receiver includes internal circuit components to flter power supply noise. under some conditions of emi and power supply noise, external power supply fltering may be necessary. if receiver sensitivity is found to be degraded by power supply noise, the flter network illustrated in figure 2 may be used to improve performance. the values of the flter components are general recommendations and may be changed to suit a particular system environ - ment. shielded inductors are recommended. figure 1. receiver block diagram terminating the outputs the pecl data outputs of the receiver may be terminated with the standard thevenin-equivalent 50 ohm to v cc C 2 v termination. other standard pecl terminating techniques may be used. the two outputs of the receiver should be terminated with identical load circuits to avoid unnecessarily large ac current in v cc . if the outputs are loaded identically the ac current is largely nulled. the signal detect output of the receiver is pecl logic and must be loaded if it is to be used. the signal detect circuit is much slower than the data path, so the ac noise generated by an asymmetrical load is negligible. power consumption may be reduced by using a higher than normal load impedance for the signal detect output. transmission line efects are not generally a problem as the switching rate is slow. the signal detect circuit the signal detect circuit works by sensing the peak level of the received signal and comparing this level to a reference. figure 2. filter network for noise filtering receiver receptacle trans- impedance pre- amplifier filter gnd limiting amplifier pecl output buffer pecl output buffer data out signal detect circuit sd data out v cc 100 nf 3.3 h 100 nf 10 f filtered v cc to data link +
4 transmitter section design the transmitter section, figure 3, uses a multiple quantum well laser as its optical source. the package of this laser is designed to allow repeatable coupling into single mode fber. in addition, this package has been designed to be compliant with iec 825 class 1 and cdrh class i eye safety requirements. the optical output is controlled by a custom ic which detects the laser output via the monitor photo - diode. this ic provides both dc and ac current drive to the laser to ensure correct modulation, eye diagram and extinction ratio over temperature, supply voltage and life. pcb mounting the afct-5179xz has two solderable mounting studs, figures 5 and 6. these studs are not electrically connected. the transceiver is designed for common production processes. it may be wave soldered and aqueous washed providing the process plug is in place. each process plug can only be used once during process - ing, although with subsequent use, it can be used as a dust cover. figure 4. recommended circuit schematic data data pecl input laser modulator laser laser bias driver laser bias control photodiode (rear facet monitor) figure 3. simplifed transmitter schematic no internal connection no internal connection top view v e e r 1 rd 2 sd 4 v ccr 5 v cct 6 td 8 v eet 9 notes: the split-load terminations for ecl signals need to be located at the input of devices receiving those ecl signals. recommend 4-layer printed circuit board with 50 ? microstrip signal paths be used. r1 = r4 = r6 = r8 = r10 = 130 ? r2 = r3 = r5 = r7 = r9 = 82 ? c1 = c2 = 10 f (see figure 2) c3 = c4 = c7 = c8 = 100 nf c5 = c6 = 0.1 f l1 = l2 = 3.3 h coil or ferrite inductor. terminate at the device inputs v cc filter at v cc pins transceiver v cc c8 c1 l1 l2 td rd 3 td 7 r8 rd rd v cc r5 r7 r6 c6 sd r10 c7 c2 c3 c4 r4 v cc r2 r3 r1 termination at transceiver inputs td c5 r9
5 regulatory compliance feature test method performance electrostatic discharge (esd) to the electrical pins mil-std-883f method 3015.7 class 1 (> 1 kv) C human body model electrostatic discharge (esd) to the duplex sc receptacle variation of iec 801-2 products of this type, typically, withstand at least 15 kv without damage when the duplex sc connector receptacle is contacted by a human body model probe. electromagnetic interference (emi) fcc class b cenelec en55022 class b (cispr 22a) vcci class 1 typically provide a 17 db margin to the noted standard limits up to 6 ghz, when tested in a gtem cell with the transceiver mounted to a circuit card with a chassis enclosure. immunity variation of iec 801-3 typically show no measurable efect from a 10 v/m feld swept from 27 mhz to 1 ghz applied to the transceiver without a chassis enclosure. eye safety fda cdrh 21-cfr 1040 class i cdrh accession number: 9521220-121 iec 825 issue 1 1993:11 class 1 cenelec en60825 class 1 tuv bauart license: 933/21201880/10 component recognition underwriters laboratories and canadian standards association joint component recognition for information technology equipment including electrical business equipment. ul file#: e173874 performance specifcations absolute maximum ratings stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. limits apply to each parameter in isolation, all other parameters having values within the recommended operating conditions. it should not be assumed that limiting values of more than one parameter can be applied to the product at the same time. exposure to the absolute maximum ratings for extended periods can adversely afect device reliability. parameter symbol minimum maximum units notes storage temperature t s -40 +85 c C operating temperature C afct-5179bz/dz C 0 +70 c 1 operating temperature C AFCT-5179AZ/cz C -40 +80 c 1 lead soldering temperature/time C C +260/10 c/s C output current (other outputs) i out 0 30 ma C input voltage C gnd v cc v C power supply voltage C 0 +6 v C operating enviroment parameter symbol minimum maximum units notes power supply voltage v cc +3.1 +5.25 v C ambient operating temperature C afct-5179bz/dz t op 0 +70 c 1 ambient operating temperature C AFCT-5179AZ/cz t op -40 +85 c 1
6 receiver section (ambient operating temperature v cc = 3.1 v to 5.25 v) parameter symbol minimum typical maximum units notes receiver sensitivity C C C C C C -25 -31 dbm dbm 6a 6b maximum input power C -8 C C dbm C signal detect C asserted p a p d +0.5 C -25 dbm avg. C signal detect C deasserted p d -45 C C dbm avg. C signal detect C hysteresis afct-5179bz/dz p a C p d 0.5 C 4.0 db C AFCT-5179AZ/cz p a C p d 0.5 C 5.0 db C power supply current i cc C 55 100 ma 7 data output voltage C low v ol C v cc -2.0 C -1.50 v 8 data output voltage C high v oh C v cc -1.1 C -0.74 v 8 signal detect output voltage C low v ol C v cc -2.0 C -1.50 v 8 signal detect output voltage C high v oh C v cc -1.1 C -0.74 v 8 notes: 6a. minimum sensitivity for ieee 802.3ah test pattern with baseline wander. 6b. minimum sensitivity and saturation levels for a fddi test pattern as defned in fddi smf-pmdi with 4b/5b nrzi encoded data that contains a duty cycle baseline wander efect of 50 khz and a 2 23 -1 prbs with 72 ones and 72 zeros inserted (itu-t recommendation g.958). 7. the current excludes the output load current. 8. these outputs are compatible with 10 k, 10 kh and 100 k ecl and pecl outputs. transmitter section (ambient operating temperature v cc = 3.1 v to 5.25 v) parameter symbol minimum typical maximum units notes output center wavelength c 1260 C 1260 nm C output spectral width (rms) ? C C 7.7 nm C average optical output power p o -15 C -8 dbm 2 extinction ratio e r 6 C C db C power supply current i cc C 50 140 ma 3 output eye compliant with eye mask ieee std 802.3ah- 2004 4 rin rin 12 (oma) C -110 C db/hz C transmitter dispersion penalty tdp C 3.0 4 db C optical return loss orl C C 12 db C data input current C low i il -350 C C a C data input current C high i ih C C 350 a C diferential input voltage v ih C v il 300 C C mv C data input voltage C low v ol C v cc -2.0 C -1.475 v 5 data input voltage C high v oh C cc -1.165 C -0.74 v 5 notes: 1. 2 m/s air fow required. 2. output power is power coupled into a single mode fber. 3. the power supply current varies with temperature. maximum current is specifed at v cc = maximum @ maximum temperature (not including terminations) and end of life. 4. mask coordinates (x1, x2, x3, y1, y2, y3, y4) = (0.18, 0.29, 0.35,0.35, 0.38, 0.40, 0.55). 5. these inputs are compatible with 10 k, 10 kh and 100 k ecl and pecl inputs.
7 drawing dimensions figure 5. package outline drawing for afct-5179xz ) key: yyww = date code xxxx-xxxx = afct-5179 zzzz = 1300 nm max. +0.1 -0.05 +0.004 -0.002 0.25 ( 0.010 3.3 0.38 (0.130 0.015) 9.8 (0.386) 0.51 (0.020) 39.6 (1.56 ) max. max. slot depth xxxx - xxxx zzzzz laser prod 21cfr(j) class 1 country of origin yyww tx rx slot width 12.7 (0.50 ) 25.4 (1.00 ) 2.5 (0.10 ) 4.7 (0.185 ) 2.0 0.1 (0.079 0.004) 12.7 (0.50 ) area reserved for process plug n.b. for shielded module the label is mounted on the end as shown. a vago t ech. 8x ) 9x ? 2x ) 2x ? +0.25 -0.05 +0.010 -0.002 0.46 ( 0.018 23.8 (0.937) 20.32 (0.800) 2.54 (0.100) 1.3 (0.051) 20.32 (0.800) 20.32 (0.800) 15.8 0.15 (0.622 0.006) +0.25 -0.05 +0.010 -0.002 1.27 ( 0.050 14.5 (0.57) masked insulator material (no metalization) dimensions are in millimeters (inches). tolerances: x.xx 0.025 mm x.x 0.05 mm unless otherwise specified.
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2012 avago technologies. all rights reserved. obsoletes 5989-3824en av02-3587en - june 11, 2012 class 1 laser product: this product conforms to the applicable requirements of 21 cfr 1040 at the date of manufacture date of manufacture: avago technologies inc., no 1 yishun ave 7, singapore handling precautions 1. the afct-5179xz can be damaged by current surges or overvoltage. power supply transient precautions should be taken. 2. normal handling precautions for electrostatic sensitive devices should be taken. ordering information temperature range 0 c to +70 c afct-5179bz black case afct-5179dz blue case temperature range -40 c to +85 c AFCT-5179AZ black case afct-5179cz blue case 20.32 (0.800) top view 2 x ? 1.9 0.1 (0.075 0.004) 20.32 (0.800) 2.54 (0.100) 9 x ? 0.8 0.1 (0.032 0.004) dimensions are in millimeters (inches) figure 6. recommended board layout pattern
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